In the electronics industry, the tendency has been to reduce the size of electronic devices such as camcorders and portable telephones while increasing performance and speed. Integrated circuit packages for complex systems typically are comprised of multiple interconnected integrated circuit chips. The integrated circuit chips usually are made from a semiconductor material such as silicon or gallium arsenide. The integrated circuit chips may be mounted in packages that are then mounted on printed wiring boards.
Typically, the packages on which these integrated semiconductor chips are mounted include a substrate or other chip-mounting device. Substrates are parts that provide the package with mechanical base support and a form of electrical interface that would allow the external world to access the device housed within the package. When multiple chips are mounted within the same semiconductor package, routing problems may arise due to the different routing design of each individual chip. To solve this problem, an interposer is often used. An interposer is an electrical interface routing between one socket or connection to another. It is an intermediate layer often used for interconnection routing or as a ground/power plane. Sometimes the terms ‘substrate’ and ‘interposer’ are used to refer to the same thing.
A 3D integrated circuit (3D IC) is a single integrated circuit built by stacking silicon wafers and/or dies and interconnecting them vertically so that they behave as a single device. A 3D package contains two or more chips (integrated circuits) stacked vertically so that they occupy less horizontal space. Each such chip in such a 3D package could be a conventional chip, a flip chip, or other types of chips.
Conventionally, a single logic die is mounted on silicon substrate. However, if additional functionality such as flash memory is required to be added to the package stack, 3D IC is needed. A Package-on-Package (PoP) package is a 3D package in which fully tested packages are stacked on top of one another during the board mount process. A PoP package usually consists of a bottom package and a top package. A Fan-in PoP (Fi-PoP) package is a 3D package that allows the top package and the bottom package to be of different sizes so as to broaden the types of chips that could be integrated together in one single package.
The typical way of stacking multiple chips is to place each chip vertically on top of each other. Each individual chip is mounted on its own substrate and the chip-substrate units are stacked vertically, one on top of another.
When the number of chips to be so stacked is small, the thickness of the final package is still acceptable. However, the modern trend of the semiconductor industry is that more and more chips need to be stacked in a limited space, horizontally as well as vertically. If the number of chips to be stacked vertically is large, the thickness of the final package becomes unacceptable.
Furthermore, sometimes passive devices need to be integrated into the semiconductor package. Usually these devices are attached to the main substrate of the package and the devices occupy a part of the main substrate area, resulting in reduced space available for the active chips.
Thus, a need still remains for accommodating the modern trend of 3D interconnection design in semiconductor packaging, reducing the package footprint and thickness and increasing the packaging density. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.